The Pascal microarchitecture, named after Blaise Pascal, was announced in March 2014, and the first graphics cards based on it, the GeForce GTX 1080 and 1070, were announced on May 6th, 2016 and released on May 27th, 2016 and June 10th respectively. The architecture incorporates TSMC's 16 nm FinFET or Samsung's 14 nm FinFET technologies and succeeds the Maxwell microarchitecture. Initially, chips were only produced in TSMC's 16nm process, though some chips have been made in Samsung's 14 nm process (GP107, GP108).Samsung Electronics and Nvidia also have an agreement to shrink the design's die to use Samsung's 14 nm FinFET technology.
- CUDA Compute Capability 6.0 (GP100 only), 6.1 (GP102, GP104, GP106, GP107, GP108)
- DisplayPort 1.4
- HDMI 2.0b
- Fourth generation Delta Color Compression
- PureVideo Feature Set H hardware video decoding HEVC Main10 (10 bit), Main12 (12 bit) & VP9 hardware decoding (GM200 & GM204 did not support HEVC Main10/Main12 & VP9 hardware decoding)
- HDCP 2.2 support for 4K DRM protected content playback & streaming (Maxwell GM200 & GM204 lack HDCP 2.2 support, GM206 supports HDCP 2.2)
- NVENC HEVC Main10 10 bit hardware encoding (except GP108 which doesn't support NVENC)
- GPU Boost 3.0
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- CUDA Compute Capability 6.0 (GP100 only), 6.1 (GP102, GP104, GP106, GP107, GP108)
- DisplayPort 1.4
- HDMI 2.0b
- Fourth generation Delta Color Compression
- PureVideo Feature Set H hardware video decoding HEVC Main10 (10 bit), Main12 (12 bit) & VP9 hardware decoding (GM200 & GM204 did not support HEVC Main10/Main12 & VP9 hardware decoding)
- HDCP 2.2 support for 4K DRM protected content playback & streaming (Maxwell GM200 & GM204 lack HDCP 2.2 support, GM206 supports HDCP 2.2)
- NVENC HEVC Main10 10 bit hardware encoding (except GP108 which doesn't support NVENC)
- GPU Boost 3.0
- Simultaneous Multi-Projection
- HB SLI Bridge Technology
- New memory controller with GDDR5X & GDDR5 support (GP102, GP104)
- Dynamic load balancing scheduling system. This allows the scheduler to dynamically adjust the amount of the GPU assigned to multiple tasks, ensuring that the GPU remains saturated with work except when there is no more work that can safely be distributed. Nvidia therefore has safely enabled asynchronous compute in Pascal's driver.
- Instruction-level preemption. In graphics tasks, the driver restricts this to pixel-level preemption because pixel tasks typically finish quickly and the overhead costs of doing pixel-level preemption are much lower than performing instruction-level preemption. Compute tasks get either thread-level or instruction-level preemption. Instruction-level preemption is useful because compute tasks can take long times to finish and there are no guarantees on when a compute task finishes, so the driver enables the very expensive instruction-level preemption for these tasks.
- Triple buffering implemented in the driver level. Nvidia calls this "Fast Sync". This has the GPU maintain three frame buffers per monitor. This results in the GPU continuously rendering frames, and the most recently completely rendered frame is sent to a monitor each time it needs one. This removes the initial delay that double buffering with vsync causes and disallows tearing. The costs are that more memory is consumed for the buffers and that the GPU will consume power drawing frames that might be wasted because two or more frames could possibly be drawn between the time a monitor is sent a frame and the time the same monitor needs to be sent another frame. In this case, the latest frame is picked, causing frames drawn after the previously displayed frame but before the frame that is picked to be completely wasted. This feature has been backported to Maxwell-based GPUs in driver version 372.70.
Nvidia has announced that the Pascal GP100 GPU will feature four High Bandwidth Memory stacks, allowing a total of 16 GB HBM2 on the highest-end models, 16 nm technology, Unified Memory and NVLink.
