Intersil ISL3880

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Intersil ISL3880

Intersil ISL3880 Chipset
  • Firmware implements the full IEEE 802.11b/g Wireless LAN MAC protocols
  • Internal WEP Engine allows 64 or 128 bit Encryption
  • AES Hardware Accelerator
  • Start-up-modes allow the PCI configuration registers or the card bus card information structure to be initialized from a small external serial EEPROM. This allows firmware to be downloaded from the host.
  • On-chip SRAM memory
  • A low frequency crystal oscillator can maintain time, which allows the high frequency clock source to be powered off during sleep mode.
  • Firmware controlled antenna diversity
  • Data Rates . . . 1,2,5.5,6,9,11,12,18,24,36,48,and 54Mbps
  • Modulation . . . . OFDM with BPSK,QPSK,16QAM,64QAM DBPSK, DQPSK, CCK
  • Convolutional coding and interleaving on all OFDM rates
  • Targeted for OFDM Multipath Delay Spreads from > 800ns for 6 Mbps to > 100ns for 54Mbps
  • Targeted for CCK Multipath Delay Spreads > 90ns at 11Mbps, >200 ns at 5.5 Mbps, and >360ns at 1 and 2Mbps
  • Direct interface with the ISL3680 Direct Conversion Transceiver Applications
  • High Data Rate Wireless LAN Systems Targeting the IEEE 802.11b/g Standards.
  • Cardbus32 Wireless LAN Adapters
  • Mini-PCI Wireless LAN Cards
  • 3V PCI Wireless LAN Adapter
Documentation
Intersil ISL3880 Datasheet

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